1. Field of the Invention
This invention relates to an apparatus and a method for generating an output clock, particularly relates to an apparatus and a method for generating an output clock signal using a free-run clock generator.
2. Description of the Prior Art
The reference clock generator is a very popular device for providing a reference clock. Conventionally, a reference clock generator can be an oscillator or a combination of a crystal and an oscillation circuit. The power consumptions of these kinds of reference clock generators are high.
The electronic device can operate in a power-saving mode or a sleep mode to reduce the power consumption of the electronic device. When the electronic device operates in the power-saving mode or the sleep mode, the electronic device periodically check whether the electronic device receives the link signal or not and determines whether the electronic device need to operate in the normal mode.
The conventional method is utilized an external component, such as a resistor or a capacitor, and an internal component, such as a resistor or a capacitor, to generate a clock signal having a long period according to a RC constant. However, this long period clock signal is not stable that the period may change with the changes of temperature, voltage or/and the manufacture process of semiconductor.
In additions, an integrated circuit (IC) includes a phase-lucked loop (PLL) and needs at least one pin, which receives an external clock. The PLL produces the other reference clock according to the external clock.